1. Field of the Invention
The present invention relates generally to electronic packaging in the semiconductor industry. More specifically, the present invention relates to electronic components using a permanent or temporary barrier or underfill layer of a polymer material containing apertures that also acts as a stencil in the application of solder and flux mixtures or polymer conductive pastes to effect mechanical and electrical connections of the substrates to electronic circuits.
2. State of the Art
Electronic devices—a combination of a plurality of electronic components, such as resistors, capacitors, inductors, transistors, and the like, mechanically and electrically mounted to contact pads interconnected by conductive paths in a substrate or printed circuit board (PCB)—are essential gadgets of modern life found in equipment or technologies ranging from everyday items such as televisions, microwaves, and simple digital clocks to all sorts of sophisticated medical equipments, computers, airplanes, and satellites. As these different technologies become more and more sophisticated and advanced, the manufacturers of electronic devices or integrated circuits are faced with the conflicting requirement of packing significantly higher numbers of electronic components on substrates that continue to shrink in size because of the ever-increasing desire of component and equipment miniaturization. Therefore, as the size of semiconductor devices decreases with each generation, a greater precision is required in placing and connecting the different electronic components to the substrates.
Initially, electronic components were mounted to printed circuit boards by feeding component leads through predrilled holes and soldering the leads to the contact pads on the circuit board. Such a mounting approach made it simple to remove and repair defective components by melting the previously deposited solder, removing the inoperative element, and soldering a new one in its place. As the size of integrated circuits decreased and the number of components in a board increased, surface mounting technologies were developed to allow the electronic elements to be mounted directly to the surface of the printed circuit board (PCB), thus reducing the size of contact pads and their proximity in the board. FIG. 1 of the prior art illustrates an electronic circuit assembly 2 wherein an electronic component 4 is surface-mounted to a PCB or substrate 8. Hereinafter, like elements are identified by like numbers to facilitate the description and disclosure of the invention. First, contact pads 10 at the end of electric connections 12 disposed on a PCB surface, corresponding to the same pattern of connector leads or surface contacts 6 in the electronic component, are supplied with a uniform amount of solder. Secondly, once the electronic component 4 is placed on the appropriate contact pads on top of the PCB or substrate 8, the solder paste is melted momentarily and subsequently allowed to cool, thus forming the desired mechanical and electrical connection between the connector leads 6 and contact pads 10. Other forms of surface mounting electronic components to high-density semiconductor packages are also available, including ball grid array (BGA), chip-on-board, tape automated bonding, or flip-chip methods to mention a few.
Until recently, the use of metal masks or stencils was one of the preferred methods to apply solder paste onto PCB surfaces for connecting the contact pads of surface-mounted components. FIG. 2 of the prior art illustrates generally a PCB/stencil assembly 14 for this purpose. Stencil 16, with a plurality of apertures 18 formed in predetermined locations corresponding to the pattern of the contact pads 10 on the PCB or substrate 8, is placed near or on the PCB surface, aligned over the contact pads to which the solder paste is to be applied, and removed after the solder paste is deposited. A sectional view of this solder deposition process taken along line A-A of FIG. 2 for a single aperture is illustrated in FIGS. 3A-3C of the prior art. In the solder bump manufacturing apparatus 20 of FIG. 3A, the stencil 16 is placed on the surface of the PCB or substrate 8, its aperture 18 aligned with the contact pad 10, and solder paste 24 is deposited on the top surface of the stencil 16, and, by use of a solder applicator 22, forced into each aperture 18 as shown in FIG. 3B. Subsequently, as shown FIG. 3C, the stencil 16 is removed, leaving on each contact pad 10 a solder bump 28.
Current metal stencil fabrication processes include chemical etching, electropolishing, and laser cutting. In chemical etching, the desired aperture pattern on a brass or stainless steel sheet is created by selectively removing material by a chemical process. Because of the nature of the process, (i) uncertainty in the size and position of the solder pads is common due to misregistration errors, (ii) only limited stencil aspect ratios (thickness to diameter ratio) are possible, and (iii) accurate etching is nearly impossible when fine-pitched pads are mixed with wide pads since etching speed is dependent on pad width. Electropolishing is similar to chemical etching with the exception of an additional electrochemical etching step that attempts to smooth the surface of aperture walls; therefore, a typical electropolished stencil still has all of the drawbacks associated with an etched stencil, although paste release is enhanced to a certain degree because of the relatively smoother aperture walls. Electroformed stencils are formed by plating a suitable desired metal on a substrate having the desired aperture shapes thereon. Electroformed stencils have smooth aperture shapes and smooth surfaces. Laser cut stencils are made by removing material from the metal stencil with a laser beam. Laser cut metal stencils are significantly more expensive and the aperture sidewalls are relatively rough, with uncontrolled buildup as molten metal redeposits upon cooling. This limits the usefulness of the finer geometry in a laser cut stencil as solder pastes will not release well.
One of the limitations on how much an electronic circuit can shrink in size is associated with the soldering process just summarized. This is so because it is important that an equal amount of solder paste be placed on top of each contact pad so as to assure that the component will not be mounted crookedly, each and every connection will be made, and contact pads in proximity of one another will not be inadvertently shorted or bridged because of excess solder paste. These limitations are exacerbated when one considers, for example, that currently, tolerances in PCB using flip-chip technology are critical and spacing between chips on the circuit board are typically in the range of 0.2 to 3.0 mils.
Besides the aforementioned problems associated with the use of metal stencils for the application of solder for surface mounting electronic components, i.e., variation on the amount of solder deposited in each contact pad, including bridging caused by solder excess, the technique is plagued with several other problems. First, the ratio of the height to the occupied area of the resulting solder bump is limited and variation on solder amount from bump to bump is affected by the release of the solder paste from the apertures in the stencil. As the aperture dimensions decrease, the base cross-sectional area of the aperture decreases, however, it is still desirable to keep the material being applied through the aperture in the stencil at the same vertical size or height, or greater. Further, such material applied through the apertures of the stencil must be placed very close together. Unfortunately, current technology requires that as the vertical size or height increases, the base cross-sectional area of an aperture of the stencil must increase as well for release of the material applied through the apertures. This limits the pitch or spacing of the apertures in the stencil. Further, because it is difficult to perfectly seal the lower edge of the aperture against the top surface of the contact pad, solder material leaks, depositing paste on unwanted locations on the substrate. FIG. 4 of the prior art illustrates a metal stencil design 20′ disclosed in U.S. Pat. No. 5,460,316, issued Oct. 24, 1995, that attempts to solve these two problems by providing apertures with tapered walls, so that the aperture is wider or has a larger cross-sectional base area on the substrate side to provide an improved release of the material from the aperture, and with raised lower edges 26 in order to minimize the solder leakage problem. Unfortunately, since the taper of the aperture in the stencil is small, with the aperture wall being substantially vertical, the material applied through the aperture can be pulled away from the substrate when the stencil is removed, thus resulting in the same problem that the modified metal stencil design attempted to solve.
FIGS. 5A-5C of the prior art (U.S. Pat. No. 6,089,151, issued Jul. 18, 2000) illustrates yet another improvement to metal stencil designs 20″ in order to minimize the problem of insufficient deposition and/or removal of solder material deposited on a contact pad after a metal stencil is removed. The stencil 16 consists primarily of an aperture 18 having walls 19 and 21 of two different diameters, thus minimizing the wall shear stress between the stencil and the solder material being applied to the semiconductor device. Since the material only contacts a small area of the portion formed by the first wall 19 of the aperture in the stencil (as shown in FIG. 5B), substantially all the material applied through the aperture remains on the semiconductor device and not in the aperture of the stencil. However, although the problem of solder removal when the stencil is lifted is minimized (FIG. 5C), the pitch or spacing of the apertures in the stencil is reduced because of the required larger aperture diameter next to the substrate surface.
Another known problem of these metal stencils is that their quality deteriorates with time because of damage, particularly the edges and junctions between the upper surface of the stencil and the sidewalls of the apertures, caused by mechanical pressure applied by solder applicators as individual stencils are normally used several times over in high-volume manufacturing processes. In order to ameliorate this wear problem, as illustrate in FIG. 6 of the prior art, wear-resistant metal stencils 16 have been proposed with a protective diamond coating 30 covering the exposed edges of the metal stencil (U.S. Pat. No. 5,460,316, issued Oct. 25, 1995). Although the wear problem is reduced, the price of the stencil is certainly increased because of the need for the additional protective coating made of an expensive material.
Another typical problem of surface mounting is the fact that the materials used to make the electronic components, the solder, and the circuit board have different coefficients of thermal expansion. During operation, increases in temperature will cause the circuit board to expand more than the component or chip, while cooling produces the opposite result. The net effect is that the joints or solder contacts are strained, resulting in early fracture failures. A solution to this problem is the use of an underfill or barrier material between the substrate and the electronic component. An underfill can be thought of as an adhesive that mechanically couples the low-expansion chip to the high-expansion substrate, including the solder joints. As chip assembly becomes better understood and reliable packaging methods become available in the marketplace, mounting methods that increase productivity are highly desirable. Together with application of solder and flux materials, underfill processes are clearly the bottlenecks to increased productivity in the manufacturing of these electronic devices.
Recently, as an attempt to ameliorate some of the problems with fabrication and use of metal stencils, U.S. Pat. No. 6,253,675, issued Jul. 3, 2001, discloses a polymer solder paste stencil printing apparatus and method for applying a controlled pattern and volume of solder paste onto a single area array component site on a populated PCB for rework or repair purposes. The stencil is a disposable, adhesive-backed, flexible membrane with several apertures and including a periphery area that can be folded or shaped to fit into the available space to be stenciled. In use, a protective, adhesive-backed layer is removed, the stencil is locally attached to the surface of the PCB to be repaired, solder is applied, and the removable, adhesive-backed stencil is peeled from the PCB and disposed of. As previously discussed, the need to peel off the adhesive-backed stencil will certainly lead to variations in the amount of deposited solder material in the different apertures, leading to problems of uneven mounting and/or possibly shorting or bridging because of excess solder paste that may still leak through.
The use of a permanently attached polymer stencil is disclosed in U.S. Pat. No. 6,228,678, issued on May 8, 2001, wherein a polymer material is applied to the surface of a semiconductor wafer as an underfill and processed to form apertures, exposing contact pads in the semiconductor wafer. The apertures are filled with a solder material, extending a distance above the underfill polymer material, and, separately from the solder paste application process, a flux material is either applied to the face of the entire semiconductor wafer or, alternatively, only to the portion of the bumps that extends above the underfill material. Problems with this technique include (i) the reduction in chip productivity associated with the separate application steps of solder and flux; (ii) the wasteful use of excess solder material extending a distance beyond the underfill material because solder is generally expensive and unfriendly to the environment when excess amounts have to be discarded; and (iii) difficulties in handling the substrate with excess solder and flux on it because of the sticky nature of these materials.
Accordingly, surface mounting electronic components or chips using permanent and/or temporary polymer underfills or barriers attached to the face of the substrate that also act as stencils in the application of solder/flux pastes or polymer stencils that can later be removed after reflow would be advantageous to overcome the problems inherent in the prior art solutions.